1. Field of the Invention
The present invention relates to a bus system to couple computing devices.
2. Art Background
As electronic computing and communications systems continue to increase in features and complexity, and to shrink in physical size and cost per function, more and more constraints are placed on the system designer. The demand for such systems is focused in high-volume, cost-sensitive markets such as consumer electronics, where rapid time-to-market is a business necessity. The only feasible approach to deliver more complex systems in less time and at lower prices is to make effective use of advanced integrated circuit technology, push functionality into software, and migrate subsystem components from one design into subsequent designs.
Re-use of subsystem components in subsequent designs have become quite common. Many other benefits are realized in addition to the time savings achieved. First, a model may be written for the proven subsystem that can provide accurate results when analyzing the requirements and performance of a new system design; the model for a new, unproven subsystem is likely to be neither as accurate as the proven subsystem, nor built in time to influence the design. Second, proven subsystems can serve as building blocks that simplify the overall design process by allowing the system designer to focus at a higher level of abstraction, while providing improved predictability in the resulting system implementation. Third, re-use of hardware subsystems protects the investment in software to control those subsystems, and allows the system software implementation to proceed as soon as the hardware building blocks have been chosen. Finally, subsystem re-use protects the investment in verification and testing. Since the desired systems are highly integrated, the required subsystems end up deeply embedded within an integrated circuit. In deeply-embedded designs, verifying the design functionality becomes very challenging and testing an individual system to prove that it is correctly built can lead to expensive delays or costly system rework. Thus, maintenance of the integrity of subsystem verification and test is likely the single biggest gain from design re-use.
Traditional approaches to design re-use have various strengths and weaknesses. An essential aspect of such approaches is the communications interface the various subsystems present to one another. One approach is to define customized point-to-point interfaces between a subsystem and each peer to which it must communicate. This interface style is particularly popular in applications where data flows from a first subsystem into the subsystem being designed, which processes the data and outputs the data to a second subsystem. This customized approach offers protocol simplicity, guaranteed performance, and isolation from dependencies on unrelated subsystems. However, customized interfaces by their very nature are inflexible. If a new application needs an existing subsystem to be interfaced to one that does not share its interface, design re-work is required. If the application requires the subsystem to communicate with different subsystems, multiple copies of subsystems or interfaces may be required, leading to system inefficiencies. Furthermore, if an updated algorithm is to be implemented in the subsystem, the new algorithm will need to be wedged into the old customized interfaces to allow communication with existing peer subsystems.
A second approach is to define a system using standardized interfaces. It is common to see standardized interfaces paired with various forms of shared interconnect to form a communications subsystem. Many standardized interfaces are based on pre-established computer bus protocols. One significant advantage to this approach is flexibility in communications patterns: the ability for every agent to communicate with every other agent in the system. Computer buses allow flexibility in system design, since as many different agents may be connected together as required by the system, as long as the bus has sufficient performance. A final advantage is the natural mapping of address/data transfers, which are fundamental to processor-memory communications, into systems where complex algorithms that are implemented in software need to communicate with hardware subsystems. Along with shared interconnect comes a requirement to allocate the communications resources among the various initiator devices and target subsystems. In the case of computer buses, resource allocation is typically referred to as arbitration.
A principal disadvantage of standardized bus interfaces is the uncertainty in transfer delay (normally called latency) that results from arbitration. Latency uncertainty causes trouble for subsystems that must satisfy real-time constraints, since data that does not arrive in time to meet a deadline can result in improper system behavior. A second disadvantage is a lack of total available transfer opportunities (normally called bandwidth) that results from the computer system heritage. Historically, as well as presently, a bus typically is designed to support the peak transfer rate of the processor connected to it, and transfer opportunities not claimed by the processor are made available to other agents. Systems with combined bandwidths in excess of the peak processor bandwidth therefore must resort to multilevel bus schemes, or a mix of buses and dedicated connections, to separate the bandwidth. A final disadvantage is the inability to effectively support communication that does not map easily into address/data transfers (for instance, handshaking signals between two agents) or communications originated by an agent that is not an initiator (for instance, an interrupt signal driven by a target subsystem to signal an initiator device that data is available).
In summary, existing communication approaches do not meet the requirements for effective design re-use. What is needed is a new structure that allows maximum subsystem re-use in systems that span a wide range of performance characteristics. If a computer bus could be extended to remove its performance and communications style limitations, it might well serve as the basis for many highly integrated systems.
Furthermore, subsystem communications requirements vary greatly. Some subsystems, such as input/output devices like keyboards, infrared remote controllers, and LED displays, have very low bandwidth requirements and are very tolerant of variable latency. Other subsystems, such as a RISC CPU or a digital signal processor, desire high available bandwidth and low latency to memory, but can tolerate bandwidth limits and variable latency at the expense of slower program execution. Still other subsystems, such as a T1 telephony link or an SVGA display, have moderate to high bandwidth requirements, but cannot tolerate uncertainties in bandwidth nor latency. Such real-time subsystems need guaranteed bandwidth and latency, and there is no advantage to providing any extra performance.
Therefore, it is desirable that such a communication mechanism would allow subsystems of widely varying performance characteristics to interoperate, and greatly improve the re-use of the subsystems by providing a standardized interface. However, this does not address the issue that the operating frequency of the communication mechanism must be variable to support the required bandwidth of the system under design. If a standardized interface is at the communication interface, changing frequencies of the communication interface requires changing the operating frequencies of the subsystems. Increasing the frequency of a subsystem beyond its requirements wastes power, can lead to algorithmic problems (some subsystems need to operate at fixed frequencies), and can prevent design re-use altogether when the new frequency is higher than the previously-designed subsystem can operate. What is needed is a method to de-couple the frequency of the communication interface from the operating frequencies of the various client subsystems, so that each may operate based on their own requirements.